Nvidia is providing billions of dollars to expand AI chip packaging capacity at Siliconware Precision Industries, Reuters reports. The financing targets a production bottleneck, although neither Nvidia nor its supplier confirmed the arrangement.
Nvidia is financing additional advanced packaging capacity at Siliconware Precision Industries, or SPIL, according to an industry executive cited by Reuters. The money will support new factory space and equipment.
SPIL is part of Taiwan's ASE Technology. Nvidia did not respond to Reuters' request for comment, while ASE said it does not comment on market rumours involving customers.
TSMC dominates chip-on-wafer-on-substrate, or CoWoS, packaging, which connects processors and memory chips on a shared base so they can work together at high speed. Nvidia, AMD and Broadcom use the technology, but TSMC's capacity limits have pushed some chip designers to seek additional supply.
For companies building AI services, the expansion highlights a hardware constraint beyond making the chips themselves. Demand for AI chips is outstripping available packaging capacity, making this manufacturing step an important part of expanding AI infrastructure.
Funding factory space and equipment addresses a physical constraint on AI computing supply.
Additional packaging suppliers could reduce chip designers' dependence on TSMC's limited capacity.
The reported financing is significant, but its scale remains unconfirmed by Nvidia or ASE.
Written automatically by the Made in 10 Newsroom from the source above.
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